Marc POULHIÈS

Embedded system and toolchain software engineer
Free software enthusiast

m@poulhies.fr
+33 6.22.65.38.88
http://poulhies.fr

Work Experience

• 2021-current - AdaCore. Compiler engineer
  • Working on GCC and the Ada Frontend (GNAT).
• 2012-2021 - Kalray (Grenoble). Compiler and toolchain engineer
  • Ported and maintained the toolchain for Coolidge processor (GNU GCC, GNU binutils). Includes ABI definition, relocations, TLS and PIC mechanisms, dynamic loading (GNU/Linux and in-house OS), keeping up-to-date with upstream projects.
  • Maintained toolchains for the Andey and Bostan processors until their end of life.
  • Contributed to software quality improvements (documentations, scripts, tutorials)
  • Setup an internal compiler-explorer instance for easier compiler development and application level performance debugging.
  • Enhanced existing simulator (ISS).
• 2010-2012 - VERIMAG (Grenoble). Software Engineer
  • Reengineered the Compiler for the BIP component framework (Java, antlr, EMF, C++, formal methods).
  • Extented the MIND compiler for the co-generation of an executable for embedded targets and a BIP formal model.
  • Setup a continuous integration (Jenkins) and bug tracking system (trac).
• 2006-2010 - Orange Labs R&D and VERIMAG (Grenoble). PhD candidate
  • Developped prototype tools and runtimes for the co-generation of an executable (targeting AVR, MSP430 and ARM7TDMI) and a BIP formal model.
• 2005 CERN (Switzerland). Intern in the Fabric Infrastructure and Operations (FIO) team
  • Designed and implemented a secure delivery system (SINDES) for large clusters composed of hundreds of nodes.
• 2005 Drakkar, Université de Grenoble Alpes (France). Intern
  • Developped a DHCP server for IPv6.

Certifications

• 2019 Certx ISO 26262 - Functional Safety for Automotive - Red Belt
• 2015-2024 Rescue Worker

Education

• 2006-2010 PhD in Computer Science: «Conception et Implantation de Système Fondé sur les Composants. Vers une Unification des Paradigmes Génie Logiciel et Système»
  Supervisors: Joseph Sifakis (VERIMAG) and Jacques Pulou (Orange Labs R&D) Grenoble, France.
• 2004 CLUSTER Student Exchange, ENSIMAG, Grenoble, France.
• 2001-2005 MSc in Computer Science EPFL, Lausanne, Switzerland.
• 2000 CPGE MPSI Lycée Berthollet, Annecy, France.

Interest

• Paragliding: solo and tandem. See cfd, xcontest or syride.
• Computer/electronic: I am tinkering with various topics
  • GCCrs (Rust frontend for GCC): Regular contributor.
  • Compiler Explorer: Regular contributor.
  • DIY Mechanical Keyboard: KiCad (PCB design), SMD soldering (iron and hot air), STm32, embedded Rust.
  • Basic Ada support on Sega Dreamcast.
  • Kid Alarm Clock: DIY PCB, embedded Rust, TM4C123, event based programming.
  • Barndoor Tracker: DIY PCB, Arduino, astrophotography.
  • Self hosting web, emails, vpn, distributed backup, git.

Past projects: encryption for libstore for GNU Hurd, airspace map, planner and checker (Django, GIS, OpenLayers), automatic creation/upload timelapse for documenting weather phenomenon and many more…

I am a regular contributor to free software projects.